UVM Verification Experts
| Job Type | Temporary / Contract |
| Location | Helsinki |
| Area | Helsinki, Finland |
| Sector | CAE/NVH Embedded Electrical |
| Salary | Negotiable |
| Currency | EUR |
| Start Date | ASAP |
| Job Ref | 94135 |
| Job Views | 2452 |
- Description
- Our client is looking for several UVM Vertification Engineers for long-term assignment in Helsinki, Finland.
- Start Date: ASAP
- Contract duration: 12+ months
- Good rates, ongoing needs
- The candidate must have the right to live and work in the EU.
Requirements:- Experts that we are looking for have extensive experience of architecting and implementing Verification test benches for complex IP & module level design.
- Previous experience of SystemVerilog and UVM Methodology for RTL verification (test case creation and/or testbench creation)
- Datapath verification of signal processing desings in Linux environment
- Previous experience in Matlab simulink is not manadatory but is a big advantage
- The candidate selected for this position shall have ability to understand & communicate in English.
If you're interested in this role, click 'Apply Now' to forward an up-to-date copy of your CV.